1. Field of the Invention
The present invention relates to electronic circuits and, more specifically, to a CMOS differential amplifier that reduces the speed-limiting effects of capacitance, as well as reducing the required level of the supply voltage.
2. Description of the Prior Art
Differential amplifiers sense two input signals and output a signal that is a function of the difference in values of the two input signals. One type of differential amplifier employs complementary metal-oxide semiconductor (CMOS) integrated circuits. CMOS differential amplifiers are used for various applications because a number of advantages can be derived from these types of amplifiers, as compared to single-ended amplifiers. Differential amplifiers are used to amplify analog, as well as digital signals, and can be used in various implementations to provide an output from the amplifier in response to differential inputs. They can be readily adapted to function as an operational amplifier, a comparator, a sense amplifier and as a front-end buffer stage for another circuit. Differential amplifiers are used where linear amplification having a minimum of distortion is desired.
However, a typical differential amplifier will operate only over a relatively narrow range of common-mode input voltages. As the amplifier is forced to extend beyond this small range of common-mode voltages, the differential-mode gain drops off sharply and in some instances drops to zero.
One technique for improving the range of this common-mode input voltage range is described in U.S. Pat. No. 4,958,133, issued to Bazes, which discloses complementary pairs of transistors that are symmetrically configured. Corresponding symmetrical transistors are matched to have the same characteristics. Because of the biasing scheme, negative feedback is provided internally within the amplifier to provide the low sensitivity to variations. A strong common-mode rejection is provided because of the self-biasing scheme, in order to provide an extended range of common-mode input voltages, but at the same time providing a high gain in differential-mode amplification. Certain transistors employed in a device according to the Bazes patent exhibit capacitance, which limits the response speed of the amplifier.
Therefore, there is a need for a differential amplifier that reduces speed-limiting effects of capacitance.